April 5, 2017: I will give a research seminar on “Mitigating Power Issue in High-Performance Microprocessors Using Current-Mode Clocking” in the College of Science and Technology at University of Southern Mississippi, Hattiesburg.

March 30, 2017: I will give a research seminar on “Low-Power Current-Mode Clocking and Synthesis for High-Performance Microprocessors” at the Department of Electrical & Computer Engineering at the University of Michigan-Dearborn.

March 27, 2017: I will give a research seminar on “Mitigating Power Issue in High-Performance Processors Using Current-Mode Clocking” at the Department of Computer Science at the University of Central Arkansas.

March 9, 2017: I will give a research seminar on “Current-Mode Clocking and Synthesis Considering Low-Power and Skew” at the Department of Computer Engineering at State University of New York at New Paltz.

February 27, 2017: I will give a research seminar on “Mitigating Power Issue in High-Performance Processors Using Current-Mode Clocking” at the Department of Electrical and Computer Engineering at the California State University Chico.

January 26, 2017: I will give a research seminar on “Current-Mode Clocking and Synthesis Considering Low-Power and Skew” at the Department of Computer Science and Engineering at the University of South Florida, Tampa.

January 6, 2017: I am Instructing Upper-Division Course Computer Architecture (CMPE 110) in Winter 2017 as a Teaching Faculty at UCSC. Here is the link of my class: https://courses.soe.ucsc.edu/courses/cmpe110/Winter17/02

August 29, 2016: My paper “Current-Mode Clock Synthesis”, accepted in IEEE Transactions on VLSI Systems (TVLSI) Journal.

June 5, 2016: I have presented my work “Current-Mode clock Synthesis”, at Design Automation Conference (DAC) 2016 WIP Session, Austin, Texas.