Publications

Journals

  1. R. Islam and M. Guthaus, `CMCS: Current-Mode Clock Synthesis,’ accepted in IEEE Transactions on VLSI, August 29, 2016.
  2. R. Islam and M. Guthaus, `Low-Power Clock Distribution Using a Current-Pulsed Clocked Flip-Flop,’ IEEE Transactions on Circuits and Systems I (TCASI), Volume: 62, Issue: 4, March 27, 2015.

Conferences and Presentations

  1. R. Islam and M. Guthaus, `CMCS: Current-Mode Clock Synthesis,’ Design Automation Conference (DAC), WIP session, Austin, Tx, USA, June 2016. Design Automation Conference (DAC), WIP session, Austin, Tx, USA, June 2016.
  2. R. Islam, H. Fahmy, P. Lin and M. Guthaus, `Dierential Current-Mode Clock Distribution,’ IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, USA, August 25, 2015.
  3. P. Lin, H. Fahmy, R. Islam and M. Guthaus, `LC Resonant Clock Resource Minimization using Compensation Capacitance,’ IEEE International Symposium on Circuits and Systems (ISCAS), Portugal, May 24-27, 2015.
  4. H. Fahmy, P. Lin, R. Islam and M. Guthaus, `Switched Capacitor Quasi Adiabatic Clock,’ IEEE International Symposium on Circuits and Systems (ISCAS), Portugal, May 24-27, 2015.
  5. R. Islam and M. Guthaus, `Current-Mode Clock Distribution,’ IEEE International Symposium on Circuits and Systems (ISCAS), Australia, June 1-5, 2014.
  6. S. E. Esmaeili, R. Islam, A. J. Al-khalili, and G. E. R. Cowan, `Dual-Edge Triggered Sense Amplier Flip- Flop Utilizing an Improved Scheme to Reduce Area, Power, and Complexity,’ IEEE International Conference on Electronics Circuits and Systems (ICECS), Seville, Spain, December 09-12, 2012.
  7. R. Islam, `A Highly Reliable SEU Hardened Latch and High Performance SEU Hardened Flip-Flop,’ International Symposium on Quality Electronic Design (ISQED), California, USA, March 19-21, 2012.
  8. R. Islam, S. E. Esmaeili, and T. Islam, `A High Performance Clocked Precharge SEU Hardened Flip- Flop,’ IEEE International Conference on ASIC (ASICON), Xiamen, China, October 25-28, 2011.
  9. S. M. Jahinuzzaman and R. Islam, `TSPC-DICE: A Single Phase Clock High Performance SEU Hardened Flip-Flop,’ IEEE Midwest Symposium on Circuits and Systems (MWSCAS), Seattle, USA, August 1-4, 2010.